In a conventional synchronous switching buck converter, to prevent the high-side and low-side power switches from being turned on simultaneously during the switching thereof, it needs a dead-time during which both the high-side and low-side power switches are turned off. However, the dead-time may lead to efficiency degradation. Dead-time too long will result in a long time body diode conduction which will lead to power loss. On the contrary, too short dead-time will result in a short time conduction of power switches which also will lead to power loss. Thus, an optimized dead-time is needed to improve the efficiency of a converter.
FIG. 1 is a circuit diagram of a conventional digital synchronous buck converter 10 with sensorless optimization of dead-time, which includes an error amplifier 18 to generate an error signal e by comparing the output voltage VOUT of the converter 10 with a reference voltage Vref, a compensator 16 to compensate the error signal e to generate a feedback signal d, a pulse width modulator 14 to generate a pulse width modulation signal g according to the feedback signal d, a dead-time imposer 12 to generate two modified signals according to the pulse width modulation signal g and delay times td1 and td2, and a driver 11 to generate driving signals Vg1 and Vg2 according to the output signals of the dead-time imposer 12 to switch the power switches Q1 and Q2, respectively, and thereby convert an input voltage VIN into the output voltage VOUT. FIG. 2 is waveform diagram of the converter 10, in which waveform 20 represents the driving signal Vg2 and waveform 22 represents the driving signal Vg1. In the converter 10, when the driving signal Vg2 transits from high to low, the delay time td2 is imposed to delay the triggering of the driving signal Vg1. Similarly, when the driving signal Vg1 transits from high to low, the delay time td1 is imposed to delay the triggering of the driving signal Vg2. However, the dead-time optimization is implemented based on the output of the pulse width modulator 14, regardless of the output status of the driver 11. Thus, a shoot-through could be resulted once the delay times td1 and td2 are too short.
Therefore, it is desired a circuit and method for adjusted dead-time based on the output of the driver to obtain maximal efficiency of a converter.